1. Field of the Invention
The invention relates to a III group nitride semiconductor substrate, a substrate for a III group nitride semiconductor device and fabrication methods thereof.
2. Description of the Related Art
A GaN-based compound semiconductor such as gallium nitride (GaN), indium gallium nitride (InGaN), and aluminum gallium nitride (AlGaN) comes into the limelight as a material for a blue light emitting diode (LED) and a laser diode (LD). In addition, with making use of features such as heat resistance, environment characteristics resistance of the GaN-based compound semiconductor, the application development of an element for an electronic device using the GaN-based compound semiconductor begins.
In general terms, as a method for fabricating a GaN-based compound semiconductor device, a method for epitaxially growing a GaN-based crystal on a sapphire substrate is used. However, a single crystal film of GaN cannot be directly grown on the sapphire substrate, since the sapphire substrate is different in lattice constant from GaN. So as to solve this problem, a method of growing a buffer layer of AlN or GaN at a low-temperature of around 500° C. on a sapphire substrate once, relaxing a lattice strain by the low-temperature growth buffer layer, and growing GaN thereon at a high temperature of around 1000° C., is invented and placed in practical use broadly (For example, Japanese Patent Laid-Open No. 63-188983 (Patent document 1)). The single crystal epitaxial growth of GaN can be achieved by using the low-temperature growth nitride layer as the buffer layer.
However, in this technique, the crystallinity of the GaN crystal grown at a high temperature is sensitive to the thickness and the crystallinity of the low-temperature growth buffer layer, so that it is difficult to grow the GaN crystal with a good repeatability. In addition, since a growth temperature must be varied in the crystal growth, there are disadvantages in that the increase/decrease and stabilization of the temperature take a longer time and so on. Further, the epitaxial growth of the GaN single crystal on the sapphire substrate can be realized by using the low-temperature growth buffer layer, however, it is assumed that innumerable defects occurring in the GaN due to the lattice-mismatch between the substrate and the crystal become the obstacle in fabricating a GaN-based LD.
In recent years, some techniques for reducing the crystal dislocation density due to the difference in lattice constant between the sapphire and the GaN were reported, for example, an ELO (Epitaxial Lateral Overgrowth) method (Appl. Phys. Lett. 1997, Vol. 71, No. 18, p. 2638), and FIELO (Facet-Initiated Epitaxial Lateral Overgrowth) method (Jpn. J. Appl. Phys. 1999, Vol. 38, p. L184), as well as a Pendio-epitaxy (MRS Internet J. Nitride Semicond. Res. 1999, 4S1, G3, 38), and GaN epitaxial wafers with significantly improved crystallinity can be obtained. However, as for the ELO method, etc., there is a disadvantage in that complicated process such as photolithography process, etching process is required. Further, according to these methods, there is a disadvantage in that the dislocation distribution in the GaN becomes heterogeneous unless a GaN thick film having a thickness more than dozens of micrometers is grown.
In recent years, techniques of growing a GaN thick film on a substrate by HVPE (Hydride Vapor Phase Epitaxy) method and cutting out a self-standing substrate of GaN are disclosed (Japanese Patent Laid-Open No. 2000-012900, Japanese Patent Laid-Open No. 2000-022212, Japanese Patent Laid-Open No. 2000-252217 (patent documents 2 to 4), etc.). In these techniques, a technique for fabricating a GaN substrate once and growing a GaN crystal ingot by using this as a seed crystal thereafter is adopted, however, so as to simplify the process and to reduce the manufacturing cost of the GaN substrate, a technique for conducting a hetero epitaxial growth of a GaN thick film on a foreign substrate such as sapphire substrate and cutting out a self-standing substrate of the GaN directly therefrom is desirable. However, according to a conventional growth method using the low-temperature growth buffer layer, the relaxation of the strain due to the difference in lattice constant between the starting substrate and the GaN is not enough, therefore, for example, when growing the GaN on the sapphire substrate to have a thickness of about 100 μm, the GaN is naturally cracked during the growth, so that it is difficult to grow the GaN to have an enough thickness to cut out a self-standing substrate therefrom.
It has been known for a long time that micro voids are formed to have a mesh structure when a thin metal film is heated. For example, it is reported that micro voids with mesh structure are formed in a thin film of nickel, gold, copper, etc. by heating in M. L. Gimpl, A. D. McMaster, and N. Fuschillo, J. Appl. Phys. 1964, Vol. 35, p. 3572 (non-patent document 1) and L. Bachmann, D. L. Sawner, and B. M. Siegel, J. Appl. Phys. 1965, Vol. 36, p. 304 (non-patent document 2). Such mesh structure is conspicuously observed particularly in a film formed by the vacuum deposition method. However, a technique for conducting a crystal growth of a III group nitride semiconductor via a film with mesh structure thus obtained is not known.
Techniques for growing a III group nitride semiconductor crystal via titanium metal, titanium nitride, zirconium nitride, or hafnium nitride are disclosed in Japanese Patent Laid-Open No. 11-195814, Japanese Patent Laid-Open No. 2000-049092, and Japanese Patent Laid-Open No. 2000-323753 (patent documents 5 to 7), and it is disclosed that the GaN crystal growth is possible even if the low-temperature growth buffer layer is not provided, in the Japanese Patent Laid-Open No. 2000-323753 (patent document 8). However, it is specified that it is preferable that the low-temperature growth buffer layer intervenes and it is difficult to obtain a high quality GaN crystal by the epitaxial growth, when only the titanium nitride, etc. intervenes.
Technique for growing III group nitride semiconductor crystal by providing a mask of high melting thin metal film is disclosed in Japanese Patent Laid-Open No. 2000-114178 (patent document 9). However, this mask is fabricated by making full use of the photolithography method, and an aperture width of a window in a mask is limited to several micrometers due to restrictions imposed by processing accuracy. In the case of growing the III group nitride semiconductor crystal by means of this mask, a number of crystal growth nucleuses are generated from inside the windows in the mask, and effect for reducing the crystal dislocation can be obtained, however, the insertion of the low-temperature buffer layer becomes indispensable.
[Patent document 1] Japanese Patent Laid-Open No. 63-188983 bulletin
[Patent document 2] Japanese Patent Laid-Open No. 2000-012900 bulletin
[Patent document 3] Japanese Patent Laid-Open No. 2000-022212 bulletin
[Patent document 4] Japanese Patent Laid-Open No. 2000-252217 bulletin
[Patent document 5] Japanese Patent Laid-Open No. 11-195814 bulletin
[Patent document 6] Japanese Patent Laid-Open No. 2000-049092 bulletin
[Patent document 7] Japanese Patent Laid-Open No. 2000-323753 bulletin
[Patent document 8] Japanese Patent Laid-Open No. 2000-114178 bulletin
[Patent document 9] Japanese Patent Laid-Open No. bulletin
[Non-patent document 1] M. L. Gimpl, A. D. McMaster, and N. Fuschillo, “Journal of Applied Physics” (Journal of Applied Physics), 1964, Vol. 35, p. 3572
[Non-patent document 2] L. Bachmann, D. L. Sawner, and B. M. Siegel, “Journal of Applied Physics” (Journal of Applied Physics), 1965, Vol. 36, p. 304